Power & Energy Engineering · substation automation (IEC 61850)
Substation, compiled
Our IEC 61850-6 file for a representative 110/20 kV substation becomes its topology, its interlocking, its power flows and its 3D yard.
Overview
We wrote the SCL file for our own representative substation. It has a 110 kV double busbar with two lines, a bus coupler and two 40 MVA transformers, plus a 20 kV metal-clad lineup, and it validates against the official IEC 61850-6 schema. Our parser reads the file into a node-breaker graph. From that graph a compiler derives the interlocking for every switch: Boolean equations on switch positions only, never on current. A disconnector may move only when one side is dead, or when a closed parallel path exists. An earthing switch may close only on a section isolated by open disconnectors. A busbar coupler may not open while a bay sits on both busbars. A position that is intermediate or of bad quality counts as neither open nor closed, so it can only block. These are generic rules we wrote, not a utility's scheme. The compiler writes the equations back into the file, together with each bay controller's GOOSE subscriptions. Each controller subscribes to exactly the positions its equations read.
Our SCL file holds no impedances, so a separate file supplies them. It uses pandapower standard types for the lines, transformers and cables. We chose the lengths and the loads, and the 110 kV network beyond the two lines is a simple equivalent. Every combination of the 36 breakers and disconnectors, with each line either fed or earthed, maps to one of 2,965 distinct electrical topologies, and each topology was solved in advance as an AC load flow. That is why the substation answers instantly. A symbolic checker then covered every reachable switching state, all 1.17 × 10¹³ of them, and confirmed four things:
- no permitted disconnector operation connects or separates live parts; it only commutates current in a bus transfer, or moves on a dead section;
- an earthed section stays isolated from the rest of the substation;
- the two busbars are never tied by disconnectors alone;
- every state can return to the start.
A line's far end lies outside the file, so a line is earthed only after its far end has been opened by procedure. Our model then treats that line as dead.
The yard is generated from the file's own structure, in file order. Current is the only light, and its width is proportional to amps. In the film, an attempt to open line 2's busbar disconnector is refused, and the derived condition appears on screen. Then the line moves to busbar 2 on load, in the order the interlocking allows: the coupler first, then Q2, then Q1. The line breaker never moves. In our model every terminal stays on the same electrical node throughout, so the computed line current is the same 233 A at every step.
What we built
- An IEC 61850-6 SSD and SCD (SCL 2007B4) for our own representative 110/20 kV substation, with 56 switching devices and 14 bay controllers.
- An SCL parser, and a compiler that derives position-only interlocking (one CILO per switch) from the topology. It writes the equations, and the GOOSE subscriptions they need, into the SCD.
- An exhaustive check of the interlocking over every reachable switching state. It is backed by 3.4 million randomised cross-checks and seven switching sequences we wrote, all of which behave as expected.
- A precomputed lattice of AC power flows, one per electrical topology the switches can form, and a browser topology processor that turns any switch state into currents.
- A 3D night yard generated from the file and lit only by computed current, plus an interactive view where any switch can be operated.
Tech stack
IEC 61850-6 SCL (2007B4 schema), Python, lxml and xmlschema, pandapower (AC Newton–Raphson), binary decision diagrams (dd), three.js with a custom line-light shader, Playwright for deterministic capture.
Numbers
| Number | How we measured it |
|---|---|
| 3,076 SCL elements | in our SCD. Both the SSD and the SCD validate against the official IEC 61850-6 2007B4 schema with 0 errors, in two independent validators. |
| 112 interlocking equations | (EnaOpn and EnaCls for 56 switches), derived from the topology. 85 of them are non-trivial; the other 27 are breaker enables that are always true. Each CILO reads its positions with their quality: 478 inputs, 256 of them over GOOSE from other bays. |
| 1.17 × 10¹³ reachable switching states | , checked exhaustively with binary decision diagrams against the four properties above. A deliberately broken rule set fails the same check. |
| 3,392,988 cross-checks | of the shipped equations against an independent evaluation of the rules, with 0 mismatches. |
| 2,965 electrical topologies | cover every combination of the breakers and disconnectors, including earthed lines. All 2,965 load flows converged in pandapower, in 33.9 s in total. |
| 233 A | on line 2 at every step of the on-load bus transfer. The value comes from the load flow with our assumed network equivalent, line lengths and loads, with the transformer taps held at neutral. |
Stills
Try it live
An interactive view that runs in your browser. Nothing loads until you open it.
